Morning Sessions, Sunday
May 24, 8:30am-12:00pm

No. Lecturer Affiliation Title Lecturer's biography & Abstract
T01 Hanspeter Schmid University of Applied Sciences, Northwestern Switzerland Analog Circuit Design on Digital CMOS: Why it is Difficult, and Which Ideas Help
T02 Krishnendu Chakrabarty Department of Electrical and Computer Engineering at Duke University, USA Digital Microfluidic Biochips: Achieving Functional Diversity and More than Moore's Law by Connecting Biochemistry to Integrated Circuits and Systems
T03 Pierre Siohan France Telecom, Orange Labs From OFDM to Filter Bank Based Multicarrier Modulations
T04 Alan P. Su Global Unichip Corp, Taiwan An ESL Design Flow Using a Hybrid Design Platform with Test Architecture Planning and HW Debug Capabilities
T05 Albert Wang University of California, Riverside, USA ESD+RFIC Co-Design for Whole-Chip Design Optimization

Afternoon Sessions, Sunday
May 24, 13:00pm-16:30pm

No. Lecturer Affiliation Title Lecturer's biography & Abstract
T06 1.Chi-Wah Kok
2.Carrson C. Fung
1. Hong Kong Polytechnic University 
2. National Chiao Tung University, Hsinchu, Taiwan
Precoder-Equalizer Communication Systems
T07 Yen-Kuang Chen Corporate Technology Group, Intel Corporation, USA Multimedia Signal Processing on CPU and GPU with Many Cores

1. Marcelo Lubaszewski

2. Erika Cota

Universidade Federal do Rio Grande do Sul (UFRGS),Porto Alegre, Brazil Reliability, Availability and Serviceability of Networks-on-Chip
T09 1.Massimo Alioto 
2.Yusuf Leblebici
1. University of Siena,Italy 
2. Swiss Federal Institute of Technology in Lausanne (EPFL), Switzerland

MOS Current‐Mode Logic VLSI Circuits: from High‐Speed to Ultra‐Low Power Design

T10 Eduard Alarcón
Department of Electronics Engineering
School of Telecom Engineering
Technical University of Catalunya (UPC), Spain
System/Circuit Co-Design of High-Density On-Chip Power Management Functions for Battery-Operated Terminals